VLSI design & verification
From RTL thinking to reliable, testable and power-aware silicon.
Digital designA two-day international workshop on
The Two-Day Workshop on Recent Trends in VLSI, Circuits and Systems (RTVCS), held under the aegis of MNDCS-2027, is designed to give participants insight into emerging technologies and recent advancements in VLSI, Micro / Nanoelectronics, circuits and systems.
The workshop will bring together expert talks, technical discussions and hands-on exposure to encourage innovation and strengthen academia-industry and research connections in electronics.
The 7th International Conference on Micro / Nanoelectronics Devices, Circuits, and Systems (MNDCS-2027) aims to promote advanced research and developments in the areas of Micro / Nanoelectronics, Semiconductor Materials and Devices, VLSI Circuits and Systems.
The conference will feature keynotes, invited talks and oral presentations of research articles in the most relevant areas. It will provide an international platform to share research ideas, scientific thoughts and research problems among academicians, researchers, technologists and scientists.
From RTL thinking to reliable, testable and power-aware silicon.
Digital designAnalog, mixed-signal and emerging circuit techniques for new applications.
Circuit systemsConnecting hardware, embedded systems and AI at the edge.
Applied systemsUsing Verilog HDL, participants will work through combinational and sequential coding, FSMs, functional verification, synthesis, constraints, debugging and testing.
Tool: Xilinx VivadoExplore logic equivalence checking, floor and power planning, placement, clock tree synthesis, routing, static timing analysis and GDSII generation.
Tool: CadenceBring your questions. Leave with a sharper view of where VLSI and systems are headed.
Registration is free and includes access to technical and hands-on sessions, a workshop kit, working lunch, and tea and snacks for both days.
Professor
University Federal do Rio Grande do Sul (UFRGS), Brazil

Professor
Technology Department, Portalegre Polytechnic University, Portugal
Professor
EEE & Mehta Family School of Data Science and AI, IIT Guwahati
Head, Assam Regional Strategy & Ecosystem Development, TSAT
Presiding Officer, POSH TSAT Assam
Assistant Professor, E&TCE, Jadavpur University
Vice-Chair, IEEE CAS Kolkata Section
Regional Head, NER
Telecom Sector Skill Council
Associate Professor & HOD
Department of ECE, NIT Silchar
Associate Professor
Department of ECE, NIT Silchar
CEO & Mission Director
Da Spatio Rhobotique Laboratory Pvt. Ltd.
Head of Hardware Engineering,
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